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Verilog Challenge Leaderboard: Season 1

Season 1 points from the weekly Verilog challenges: 10 per solve, extra for the bonus and the first three solvers. Only members who agreed to be named.

A correct solve earns 10 points, the bonus task adds more, and the first three solvers of each challenge get extra. The board shows only members who agreed to be named.

This season

  1. Week 1 (Foundations): Why Computers Count in Binary, from Mon, 5 Oct, 7:30 pm IST, then Challenge #2: Half Adder on Wed, 7 Oct, 7:30 pm IST
  2. Week 2 (Foundations): Logic Gates, and Why NAND Can Build Everything, from Mon, 12 Oct, 7:30 pm IST, then Challenge #3: Full Adder on Wed, 14 Oct, 7:30 pm IST
  3. Week 3 (Building blocks): K-Maps: Simplify Logic by Drawing Boxes, from Mon, 19 Oct, 7:30 pm IST, then Challenge #4: 4-to-1 Multiplexer on Wed, 21 Oct, 7:30 pm IST
  4. Week 4 (Building blocks): Latches vs Flip-Flops: Memory in Hardware, from Mon, 26 Oct, 7:30 pm IST, then Challenge #5: D Flip-Flop with Enable and Reset on Wed, 28 Oct, 7:30 pm IST
  5. Week 5 (Systems): Counters, from Mon, 2 Nov, 7:30 pm IST

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