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Verilog Challenge #2: Build a Half Adder
A half adder adds two 1-bit inputs and gives two outputs: sum, the low bit of the result, and carry, the high bit. Only 1 + 1 makes a carry, because 1 + 1 is binary 10. In this challenge you write the Verilog module half_adder(a, b, sum, carry) and test it in the Verilog Sandbox.
The module you will write: half_adder(a, b, sum, carry)
a(input): first bit to addb(input): second bit to addsum(output): low bit of a + bcarry(output): high bit of a + b
Where you'll use this
- University exams: half adder truth table and circuit are a standard short question
- Verilog RTL: the first building block of every adder and ALU
- Next week: two half adders are the start of a full adder
- Interviews: a quick check that you can turn a truth table into hardware
Key terms
- Half adder
- A circuit that adds two bits and outputs a sum bit and a carry bit, with no carry input.
- Carry
- The bit that moves to the next column when a column's total is 2 or more.
- Module
- Verilog's unit of hardware: a named block with input and output ports.
- Port
- A named input or output wire of a module, listed in its header.
- Testbench
- Verilog code that drives inputs into your module and checks or displays its outputs.
Questions people ask
What will I build in the half adder challenge?
A Verilog module called half_adder with inputs a and b and outputs sum and carry. The page gives the exact spec, a clickable truth table, starter code for the Verilog Sandbox and three hints that open one at a time if you get stuck.
When does the half adder challenge open?
It opens on Wednesday 7 October 2026 at 7:30 pm IST, alongside the WhatsApp group post. The worked solution, with the three most common mistakes, unlocks on Friday 9 October at 6 pm IST.
Why is it called a half adder?
Because it has no input for a carry coming from the column on its right, so it can only add the lowest column of a multi-bit number. A full adder adds that third input, and that is next week's challenge.
Last updated · Reviewed by the BitForBytes team
When it opens
The challenge opens Wed, 7 Oct, 7:30 pm IST and the worked solution unlocks Fri, 9 Oct, 6 pm IST. It goes with Week 1's topic, Why Computers Count in Binary.