SR latch from NOR gates: build and simulate it online
Two cross-coupled NOR gates remember one bit: S sets it, R resets it.
Build the sr latch from nor gates in the free online simulator — it checks your circuit automatically.
What you need
- 2 logic switches labelled S, R
- 2 probes labelled Q, QN
- 2 NOR gates
Step by step
- Inputs and outputs. From the Logic section of the library, drop digital inputs (0/1 boxes) or logic switches for the inputs, and digital outputs or probes for the outputs; give each its label in the inspector (the checker finds them by label). Switches S, R; Probes Q, QN
- Two NOR gates, cross-coupled. Q = NOR(R, QN) and QN = NOR(S, Q): each output feeds the other gate — that loop is the memory. R and QN into NOR 1 → Q; S and Q into NOR 2 → QN
- Prove it. Set, hold, reset, hold: with S = R = 0 it remembers.
Expected sequence
| # | inputs | clock | Q | QN |
|---|---|---|---|---|
| 1 | S=1 R=0 | — | 1 | 0 |
| 2 | S=0 R=0 | — | 1 | 0 |
| 3 | S=0 R=1 | — | 0 | 1 |
| 4 | S=0 R=0 | — | 0 | 1 |
Frequently asked questions
How do you build a sr latch from nor gates?
Two cross-coupled NOR gates remember one bit: S sets it, R resets it. In short: inputs and outputs, then two nor gates, cross-coupled, then prove it.
How does a sr latch from nor gates behave clock by clock?
It is checked over 4 steps: set, hold 1, reset, hold 0. The table on this page shows the expected Q, QN after each clock.
What parts do you need for a sr latch from nor gates?
2 NOR gates — plus logic switches for the inputs and probes for the outputs.
Can I simulate a sr latch from nor gates online for free?
Yes. Open it in the BitForBytes Embedded Lab, a free browser-based circuit and logic simulator: drag in the gates, wire them, and press "Check my circuit" — every clock cycle is simulated and marked for you. No download or sign-up needed.
Part of DSD 28 · Latches in the free BitForBytes digital system design course.