Master–slave JK from latches: build and simulate it online

Two D latches on opposite clock phases make an edge-triggered flip-flop; D = J·Q̄ + K̄·Q makes it a JK.

Build the master–slave jk from latches in the free online simulator — it checks your circuit automatically.

What you need

  • 3 logic switches labelled J, K, CLK
  • 1 probes labelled Q
  • 2 D latches
  • a NOT gate
  • 2 AND gates
  • 1 OR gate

Step by step

  1. Inputs and outputs. From the Logic section of the library, drop digital inputs (0/1 boxes) or logic switches for the inputs, and digital outputs or probes for the outputs; give each its label in the inspector (the checker finds them by label). Switches J, K, CLK; Probe Q
  2. Master and slave. The master latch is open while CLK is LOW (EN = NOT CLK); the slave while CLK is HIGH. Master Q → slave D. 2 D latches, 1 NOT for the clock
  3. The JK logic. The master’s D = J·Q̄ + K̄·Q, from the slave’s Q. 2 AND, 1 OR, NOT for K and for Q
  4. Prove it. Set, hold, reset, toggle, toggle.

Expected sequence

#inputsclockQ
1J=1 K=0↑1
2J=0 K=0↑1
3J=0 K=1↑0
4J=1 K=1↑1
5J=1 K=1↑0

Frequently asked questions

How do you build a master–slave jk from latches?

Two D latches on opposite clock phases make an edge-triggered flip-flop; D = J·Q̄ + K̄·Q makes it a JK. In short: inputs and outputs, then master and slave, then the jk logic, then prove it.

How does a master–slave jk from latches behave clock by clock?

It is checked over 5 steps: J=1 K=0, J=0 K=0, J=0 K=1, J=1 K=1, …. The table on this page shows the expected Q after each clock.

What parts do you need for a master–slave jk from latches?

2 D latches; a NOT gate; 2 AND gates; 1 OR gate — plus logic switches for the inputs and probes for the outputs.

Can I simulate a master–slave jk from latches online for free?

Yes. Open it in the BitForBytes Embedded Lab, a free browser-based circuit and logic simulator: drag in the gates, wire them, and press "Check my circuit" — every clock cycle is simulated and marked for you. No download or sign-up needed.

Part of DSD 31 · Master–slave flip-flops in the free BitForBytes digital system design course.

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