3-bit synchronous counter: build and simulate it online
All flip-flops share one clock; AND gates decide who toggles: T0 = 1, T1 = Q0, T2 = Q0·Q1.
Build the 3-bit synchronous counter in the free online simulator — it checks your circuit automatically.
What you need
- 1 logic switches labelled CLK
- 3 probes labelled Q0, Q1, Q2
- 3 T (or JK) flip-flops
- 1 AND gate
Step by step
- Inputs and outputs. From the Logic section of the library, drop digital inputs (0/1 boxes) or logic switches for the inputs, and digital outputs or probes for the outputs; give each its label in the inspector (the checker finds them by label). Switch CLK; Probes Q0, Q1, Q2
- Three T flip-flops on one clock. Every CLK pin to the same CLK — that is what synchronous means.
- Toggle logic. A bit flips when all the bits below it are 1. T0 = Logic 1, T1 = Q0, T2 = AND(Q0, Q1)
- Prove it. Eight clocks: 1, 2, … 7, 0.
Expected sequence
| # | inputs | clock | Q0 | Q1 | Q2 |
|---|---|---|---|---|---|
| 1 | — | ↑ | 1 | 0 | 0 |
| 2 | — | ↑ | 0 | 1 | 0 |
| 3 | — | ↑ | 1 | 1 | 0 |
| 4 | — | ↑ | 0 | 0 | 1 |
| 5 | — | ↑ | 1 | 0 | 1 |
| 6 | — | ↑ | 0 | 1 | 1 |
| 7 | — | ↑ | 1 | 1 | 1 |
| 8 | — | ↑ | 0 | 0 | 0 |
Frequently asked questions
How do you build a 3-bit synchronous counter?
All flip-flops share one clock; AND gates decide who toggles: T0 = 1, T1 = Q0, T2 = Q0·Q1. In short: inputs and outputs, then three t flip-flops on one clock, then toggle logic, then prove it.
How does a 3-bit synchronous counter behave clock by clock?
It is checked over 8 steps: count 1, count 2, count 3, count 4, …. The table on this page shows the expected Q0, Q1, Q2 after each clock.
What parts do you need for a 3-bit synchronous counter?
3 T (or JK) flip-flops; 1 AND gate — plus logic switches for the inputs and probes for the outputs.
Can I simulate a 3-bit synchronous counter online for free?
Yes. Open it in the BitForBytes Embedded Lab, a free browser-based circuit and logic simulator: drag in the gates, wire them, and press "Check my circuit" — every clock cycle is simulated and marked for you. No download or sign-up needed.
Part of DSD 36 · Synchronous counters in the free BitForBytes digital system design course.