Hazard-free SOP circuit: build and simulate it online
F = A·B̄ + B·C glitches when B changes with A = C = 1; the consensus term A·C covers the gap.
Build the hazard-free sop in the free online simulator — it checks your circuit automatically.
What you need
- 3 logic switches labelled A, B, C
- 1 probes labelled F
- 2 AND gates
- 1 NOT gate
- 3 AND gates
Step by step
- Inputs and output. From the Logic section of the library, drop digital inputs (0/1 boxes) or logic switches for the inputs, and digital outputs or probes for the outputs; give each its label in the inspector (the checker finds them by label). Switches A, B, C; Probe F
- The two product terms. A·B̄ needs a NOT on B; B·C is an AND.
- Add the consensus term. A·C is redundant for the truth table, but it holds F at 1 while B switches — no static-1 hazard. A third AND (A·C), a 3-input OR
- Prove it. The function must still be right in all 8 rows.
Truth table
| A | B | C | F |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
Frequently asked questions
How do you build a hazard-free sop?
F = A·B̄ + B·C glitches when B changes with A = C = 1; the consensus term A·C covers the gap. In short: inputs and output, then the two product terms, then add the consensus term, then prove it.
What is the truth table of a hazard-free sop?
It has 3 inputs (A, B, C) and 1 output (F), so 8 rows. The full table is on this page; the Embedded Lab checks all of them against your circuit.
What parts do you need for a hazard-free sop?
2 AND gates; 1 NOT gate; 3 AND gates — plus logic switches for the inputs and probes for the outputs.
Can I simulate a hazard-free sop online for free?
Yes. Open it in the BitForBytes Embedded Lab, a free browser-based circuit and logic simulator: drag in the gates, wire them, and press "Check my circuit" — every input combination is simulated and marked for you. No download or sign-up needed.
Part of DSD 42 · Hazards in the free BitForBytes digital system design course.